Logic BIST technology evaluation: an industrial case study
نویسندگان
چکیده
This paper presents an industrial case study on Built-In Self-Test for random logic (LBIST). The Self-testing Using MISR and Parallel SRSG (STUMPS) approach combined with multi-phase test point insertion (MTPI) has been evaluated on twenty-two industrial proven cores. The whole LBIST flow, including making cores LBIST ready and insertion of test points, has been investigated. The consequences with respect to fault coverage, MTPI parameter selection and area overhead are discussed. The case study results show that LBIST combined with MTPI can achieve comparable stuck-at fault coverages as Automatic Test Pattern Generation (ATPG) by acceptable area overhead.
منابع مشابه
Logic BIST for large industrial designs: real issues and case studies
This paper discusses practical issues involved in applying logic built-in self-test (BIST) to four large industrial designs. These multi-clock designs, ranging in size from 200K to 800K gates, pose significant challenges to logic BIST methodology, flow, and tools. The paper presents the process of generating a BIST-compliant core along with the logic BIST controller for at-speed testing. Compar...
متن کاملApplication of deterministic logic BIST on industrial circuits
We present the application of a deterministic logic BIST scheme on state-of-the-art industrial circuits. Experimental results show that complete fault coverage can be achieved for industrial circuits up to 100K gates with 10,000 test patterns, at a total area cost for BIST hardware of typically 5%-15%. It is demonstrated that a tradeoff is possible between test quality, test time, and silicon a...
متن کاملA rule-based evaluation of ladder logic diagram and timed petri nets for programmable logic controllers
This paper describes an evaluation through a case study by measuring a rule-based approach, which proposed for ladder logic diagrams and Petri nets. In the beginning, programmable logic controllers were widely designed by ladder logic diagrams. When complexity and functionality of manufacturing systems increases, developing their software is becoming more difficult. Thus, Petri nets as a high l...
متن کاملOn Integrating a Proprietary and a Commercial Architecture for Optimal BIST Performances in SoCs
This paper presents the integration of a proprietary hierarchical and distributed test access mechanism called HDBIST and a BIST insertion commercial tool. The paper briefly describes the architecture and the features of both the environments and it presents some experimental results obtained on an industrial SoC. 1. The HDBIST architecture HDBIST (Hierarchical-Distributed-Data BIST) is a propr...
متن کاملEfficient Built-In Self-Test Techniques for Sequential Fault Testing of Iterative Logic Arrays
In today’s nanometer technology era, more sophicated defect mechanisms might exist in the manufactured integrated circuits which are not covered by traditional fault models. In order to ascertain the quality of shipped chips, more realistic fault models should be addressed. In this paper, we propose built-in self-test (BIST) techniques for iterative logic arrays (ILAs) based on realistic sequen...
متن کامل